Yyyyyy x. yyyyyy

Senior-level Field Application Engineer Flash Storage Products

Marketing ~ Architecture Development ~ Design Engineering ~ Application Engineering

Customer Account Management ~ Technical Support ~ Full Product Lifecycle Management

         Offer 17+ years experience in the semiconductor industry with specialization in DRAM architecture and flash memory; highly regarded for an exceptional blend of marketing, customer relations, and technical savvy.

         Excel at design engineering, application engineering, architecture development, technical marketing, competitive analysis, and product marketing.

         Served as JEDEC Task Group Chairman for major initiatives and extremely well-versed in global standards for microelectronics.

         Vast technical acumen spans VHDL, Verilog, C++, Perl, Motorola Assembly Language, Synopsys FPGA Express, Xilinx Core Generator, PC system architecture, logic analyzers and digital oscilloscopes.

         Solid state storage expertise spans DRAM, NAND flash, compact flash, USB, SATA/SAS SSD, and PCIe flash storage.

• Possess dynamic communication and interpersonal skills which are instrumental to productively interfacing with all business and project stakeholders.

Seagate Technology, 2014 to Present

Senior Staff Field Application Engineer

         Efficiently steer pre- and post-sale activities with major customer such as Google, Microsoft, eBay, Dropbox, Box, Yahoo, and Wells Fargo.

         Analyze application requirements to align with products such as NAND Flash, SATA/SAS SSD, and PCIe flash card storage, and conduct in-depth bandwidth and latency performance analysis using Iometer and FIO.

         Actively team with enterprise and cloud customers on developing proof of concepts and new designs.

         Deliver ongoing product support and debugging including application of firmware updates and product refreshes.

LSI Corporation (acquired by Avago and subsequently Seagate), 2013 to 2014

Staff Field Application Engineer

         Delivered the complete spectrum of pre- and post-sale support, failure analysis and product debugging for HBA, RAID and PCIe flash-based storage products.

STEC, Inc., 2010 to 2013

Field Application Engineer

         Explored new opportunities by conducting system analysis, clarifying requirements and persuasively positioning products (e.g. DRAM, compact flash, USB drives, SSD) to secure and maintain accounts with industry giants such as Cisco, NetApp, Brocade, Ericsson, and Avaya.

         Championed highly responsive failure analysis and resolution onsite by proficiently leveraging oscilloscopes, logic analyzers, bus analyzers and proprietary software tools.

Spansion, LLC, 2007 to 2010

Member of Technical Staff Systems Development Engineer

         Resourcefully engineered flash memory module to enhance performance of server systems while lowering overall power consumption.

         Collaboratively developed Linux device driver for in-system memory device.

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Professional Experience (Spanison LLC) continued Yyyyyy x. yyyyyy Page 2 of 2

Product Marketing Manager

         Governed development, life cycle management, positioning and strategy of three flash memory product lines which represented $300M+ in annual revenues: ADM/AADM NOR Flash, ORNAND and MB-DDR2.

         As JEDEC chairman of JC-42.6 LPDDR2 Common Bus task group for three years, led meetings and discussions to fuel ongoing development of next-generation mobile memory specification.

         Masterminded go-to-market plans and generated marketing requirements documents, datasheets, product positioning tactics, and average sales prices.

         Joined forces with chipset manufacturers to achieve memory device support on future chipsets, strategically positioning market for LPDDR2.

         Supported external sales and field application teams by assembling high-impact marketing collateral, and by swiftly responding to product inquiries and reports of failure.

         Interfaced directly with customers to precisely align product roadmap, sample and production schedule.

Micron Semiconductor, Inc., 2004 to 2007

Mobile DRAM Architecture Engineer

         Engineered new device architectures to address specific and often challenging customer requirements not met by widely available DRAM solutions.

         As chairman of JEDEC JC-42.6 Common Bus Task Group, designed second generation mobile DRAM device specification with close attention to memory bus protocol, timing budgets, signal integrity, packaging and new feature definition.

         Participated in several JEDEC task groups, successfully proposing, developing and enriching innovative solutions for device packaging, organization, timing and functionality.

         Teamed with industry-leading memory controller architects to ensure Micron s memory products were designed with appropriate interfaces and feature sets.

         Authored marketing requirements documents, product definition documents and package specification tables for new devices.

         Provided influential coaching and mentoring to senior-level application engineering team as SME in memory device interface and operation.

         Played a pivotal role in significantly enhancing Micron s Mobile DRAM datasheets and tech notes.

Mobile DRAM Product Marketing Manager

         Spearheaded critical part of Mobile DRAM product line while exhibiting outstanding talents in customer account management, project leadership, product definition, and cost containment.

         Thoroughly evaluated market data and customer feedback to optimize product mix and decisively establish average sales prices.

         Devised product overview statements and marketing requirements documents to gauge product viability based on size of opportunities, strategic importance, and corporate support and capabilities.

Samsung Semiconductor, Inc., 2002 to 2004

Sr. Technical Marketing & Applications Engineer

         Orchestrated new product launches in seamless cooperation with major chipset companies and provided comprehensive technical support and debugging.

         Effectively aligned strategic planning of Samsung s existing and future DRAM including DDR, DDR2, RDRAM, and Network DRAM.

         Tracked DRAM validation and qualification on customer designs and advised in rectifying DRAM-related issues.

         Analyzed timing diagrams and oscilloscope screen captures to determine and amend root cause for failures.

Prior Background:

Electronic Design Engineer, Cenatek, Inc., 2001 to 2002

Electronic Component Engineer, Intel Corporation, 1999 to 2001

Technical Marketing Engineer Flash Products, Intel Corporation, 1998 (co-op)

Bachelor of Science, Computer Engineering, California State University, Chico, 1999

AS, Computer Science; AS, Engineering; AS, Mathematics; AA, Language Arts, Butte College, 1995