Electrical engineer with outstanding academic credentials and valuable, hands-on project experience.

  Personable professional with solid listening, verbal communication and interpersonal skills.

  Sound judgment and a work history of proactively identifying and resolving problems in real time.

  Operating System: Windows, Macintosh OSX and Linux.

  Software: Microsoft Office, MATLAB, Cadence, ADS and MIPS Assembler and Runtime Simulator (MARS).

  Programming: C, C++, Assembly, Verilog and VHDL.

Master of Science (MS), Electrical Engineering, Tufts University Medford, MA; earned May 2016 (3.7 GPA)

Very-Large-Scale Integration (VLSI) Design (Sept. 2015-Nov. 2015):

  Designed an 8-bit Carry Look-ahead Adder using Cadence and Verilog-XL; drew the layout of the Adder using Cadence to minimize the area of the design and implemented 8-bit Adder using 2 s complement.

  Used Cadence to simulate Logic and Dynamic circuits with Verilog-XL to see useful views of Logic Gates.

  Improved speed after calculating logical effort to size transistors in a delay-sensitive, logical datapath.

Computer Engineering: Pipeline Adder/Multiplier (Sept. 2014-Nov. 2014):

  Developed a pipelined four-bit Adder with Verilog using D-flip flop (DFF) to help implement the pipeline using MIPS Assembler and Runtime Simulator (MARS).

  Created a movie that showed how the datapath for a branch-on-equal (BEQ) works, including how the registers receive their instructions and calculates the branch address of the PC.

Design of 9th Order Chebyshev Bandpass Low-Pass Filter (Sept. 2014-Nov. 2014):

  Designed the microwave filter as a two-port network used to pass the low frequencies in the system.

  Simulated and optimized lumped elements using Advanced Design System (ADS) software.

  Successfully drew the layout of the filter in ADS.

Research: Single Instruction Single Data (SISD) (Oct. 2014-Nov. 2014):

  Researched how instructions in SISD systems work and are different from MISD, SIMD and MIMD.

  Compared two SISD systems: Von Neumann Architectures and Harvard Architectures.

  Performed microstructure and optical properties of silicon materials induced by femtosecond laser.

Digital Signal Process (DSP): FIR Filter Design (Oct. 2014):

  Leveraged windowing, frequency-sampling and the Parks-McClellan equiripple filter method to design a FIR Filter in MATLAB.

Bachelor of Science (BS), Physics, Sun Yat-sen University Guangdong, China; earned June 2013 (3.6 GPA)

Research: Microstructure and optical properties of silicon materials (Jan. 2013-June 2013):

  Built uniform nanostructures on the surface of silicon using femtosecond(fs) laser ablation.

  Used an electron microscope to test the uniform nanostructure on the surface of treated specimens.

  Discovered the result that treated specimens had a lower reflection index contrary to the untreated ones.

Timer with Speed Control (Dec. 2011-Jan. 2012):

  Designed a timer on MCS-51 microprocessor using assembly language and displayed on 7-segments.

  Connected one external interrupt to detect the keyboard and set the timer to the input value.

  Controlled the timer speed by using an A/D conversion circuit, and connected another external interrupt to the end-of-conversion pin; also changed the timer speed according to the A/D result.